1. Field of the Invention
The present invention relates to a semiconductor amplifier for the semi-microwave and microwave bands which is for use in satellite communication, terrestrial microwave communication, mobile body communication or the like.
2. Description of the Related Art
FIG. 3 is a circuit diagram of a conventional semiconductor amplifier disclosed, for example, in Japanese Patent Laid-Open No. 58-159002, "Semiconductor Amplifier for High-Frequency Electric Power". The semiconductor amplifier shown in the drawing includes a field effect transistor (hereinafter referred to simply as "FET") 24, a gate terminal 25, a drain terminal 26, a source terminal 27, a gate bias terminal 28, a drain bias terminal 29, a gate bias application line 30, a drain bias application line 31, an input DC-blocking capacitor 32, an output DC-blocking capacitor 33, an input-side impedance matching line 34, an output-side impedance matching line 35, an input-side impedance matching capacitor 36, an output-side impedance matching capacitor 37, a line 38 having a length corresponding to 1/4 of the wavelength of the fundamental wave used, and an R/F short-circuit capacitor 39.
The above conventional semiconductor amplifier operates as follows:
A semi-microwave or microwave signal entered at an input terminal 1 is amplified by the FET 24 and transmitted to an output terminal 2. The output circuit of this semiconductor amplifier is formed by the line 38 having a length corresponding to 1/4 of the wavelength of the fundamental wave, the RF short-circuit capacitor 39, the output-side impedance matching line 35, the output-side impedance matching capacitor 37, the output-side DC-blocking capacitor 33, and the drain bias application line 31. The secondary higher harmonic is short-circuited at the drain terminal of the FET by the line 38 having a length corresponding to 1/4 of the wavelength of the fundamental wave, thereby allowing the FET to operate at high efficiency. The output-side impedance matching line 35 and the output-side impedance matching capacitor 37 realize an impedance matching in the fundamental wave.
According to a report regarding the prior-art technique, it is effective, for the purpose of making the FET operate at high efficiency, to set the amplitude and the phase of the secondary-higher-harmonic load-reflection coefficient as seen from the drain, which serves as the output terminal, to 1.degree. and -180.degree., respectively. In the above-described conventional semiconductor amplifier, a front-end short-circuit line having a length corresponding to 1/4 of the wavelength of the fundamental wave is employed as a means for satisfying the above conditions.
In the conventional semiconductor amplifier, constructed as described above, the front-end short-circuit line having a length corresponding to 1/4 of the wavelength of the fundamental wave, which is used as a secondary-higher-harmonic processing circuit, is rather long, thereby making it difficult to realize the semiconductor amplifier in a small size. Further, due to the loss in the front-end short-circuit line having a length corresponding to 1/4 of the wavelength of the fundamental wave and the loss in the RF short-circuit capacitor, the amplitude of the secondary-higher-harmonic load-reflection coefficient is less than 1, resulting in a deterioration in efficiency.
FIG. 4 shows the results of a secondary-higher-harmonic injection experiment using a PHS-type FET having a gate width, for example, of 12.6 mm. The results show the efficiency characteristic of this FET with respect to the phase of the secondary-higher-harmonic load-reflection coefficient. The experiment was performed on four cases in which the amplitude of the secondary-higher-harmonic load-reflection coefficient varied as: 1.4, 1.2, 1.0, and 0.85. As can be seen from the experimental results shown in FIG. 4, the phase of a secondary-higher-harmonic load-reflection coefficient which maximizes the efficiency of the FET is around -150.degree. , which is rather deviated from the above-mentioned requisite condition for the prior-art technique, according to which the amplitude and the phase of the secondary-higher-harmonic load-reflection coefficient should be 1.degree. and -180.degree. , respectively. It is assumed that this is attributable to the incidental impedance or the like in the structure of the semiconductor amplifying element, such as FET, when actually fabricated. Accordingly, it is related to the set position where phase of the secondary-higher-harmonic load-reflection coefficient in the circuit design for driving the semiconductor amplifier device at an optimum efficiency is -180.degree. , i.e., where the short-circuit end is to be positioned in the semiconductor amplifying element. Further, from the experimental results shown in FIG. 4, the phase of the secondary-higher-harmonic load-reflection coefficient maximizing the efficiency is around -150.degree. , which means it is expected to be of a capacitive nature. Further, it can be seen that a maximum efficiency cannot be obtained in the case where there is a loss in the secondary-higher-harmonic processing circuit, as in the above conventional semiconductor amplifier, and where the amplitude of the secondary-higher-harmonic reflection coefficient is 0.85.
From the above results obtained with respect to the PHS-type FET having a gate width of 12.6 mm, it can be seen that in the case where a front-end short-circuit line having a length corresponding to 1/4 of the wavelength of the fundamental wave is used, as in the above conventional semiconductor amplifier, it is necessary to provide a long connection line for phase correction between the drain of the FET and the front-end short-circuit line having a length corresponding to 1/4 of the wavelength of the fundamental wave in order to realize a secondary-higher-harmonic reflection coefficient having an amplitude of 1.degree. and a phase of -150.degree. , which maximizes the efficiency. As a result, the size of the output circuit has to be rather large. (When, for example, a 900 MHz-band amplifier is to be formed by using an alumina substrate having a dielectric constant of 10, the connection line must extend up to a position which is at a distance of approximately 5.9 mm from the drain of the FET). Further, due to the loss in the above connection line, the absolute value of the secondary-higher-harmonic load-reflection coefficient is substantially smaller than 1, and further, as a result of the elongation of the above connection line, the frequency band where the FET operates at high efficiency becomes narrower.